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Jun
30
I have captured some of the highlights of 2008 Symposium on VLSI Technology here:
- Continuously driving incremental performance improvement in planar CMOS transistor performance is always one of the themes in VLSI Technology Symposium. This year, a number of companies have reported such efforts. For example, Toshiba reported that F and N co-implant at the halo implantation help could help to reduce the external resistance and improve NFET drive current. For pFET, Toshiba and IBM jointly announced a new Twisted Direct Silicon Bonding Technology to achieve higher hole mobility (Ref).
- AMAT and TSMC reported a novel low-K spacer technology featuring CVD-SiBCN material with low dielectric constant of 5.2 and film stress of 430MPa to boost AC and DC CMOS performance.
- The decade-old W contact technology is approaching its life limit. As the contact hole gets smaller, contact resistance is increasing, partly due to the contact barrier material. Various W replacements have been sought after. Among them Cu is the most desirable since wealth of knowledge on Cu technology has been built up over the last decade. This year, NEC reported a Direct Low-K/Cu Dual Damascene Contact Lines technology that can significantly improved the RO improved by approximately 7%.
- Intel divulged more details on its Nehalem chip and 45nm high-k/metal-gate technology. Intel claimed that stress enhancement due to “gate last” increases the stress benefit of eSiGe.The amount of Ge in the eSiGe has also increased from 22% in 65nm tech to 30% in 45nm technology. In addition, Intel also employs trench contact in NMOS to compensate for the loss of tensile strain from the absence of Tensile stress layer. The trench contact also has an added benefit of lowering the contact resistance by >50%. Another notably piece of work by Intel is the Floating Body Cell (FBC) for cache memory. The FBC technology could potentially be introduced at the 16 nm node and further scaled to the 10 nm technology generation (Ref). All together, Intel contributed 5 papers to this year Symposium.
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Tags: AMAT, Cu contact, FBC, Intel, NEC, Toshiba, TSMC, VLSI Symposium
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